IEEE 1118 : 1990
Withdrawn
A Withdrawn Standard is one, which is removed from sale, and its unique number can no longer be used. The Standard can be withdrawn and not replaced, or it can be withdrawn and replaced by a Standard with a different number.
MICROCONTROLLER SYSTEM SERIAL CONTROL BUS
05-22-2024
01-01-1990
1. Overview and Architecture
1.1 Introduction
1.2 Architecture
1.3 Bus Topology
1.4 Layer Descriptions
1.5 Conformance
2. Generic Bus Services - Service Specifications
2.1 Introduction
2.2 Architecture
2.3 Functional Specifications
2.4 User-Generic Bus Services Interface
2.5 Conformance
3. Generic Bus Services - Protocol and Procedures
3.1 Introduction
3.2 Protocol Data Unit Structure
3.3 Elements of Protocol
3.4 Generic Bus Services Procedures
3.5 Generic Bus Services - Operating System
4. System Management - Service Specifications
4.1 Introduction
4.2 Architecture
4.3 Functional Specifications
4.4 User-System Management Interface
4.5 Conformance
5. System Management - Protocol and Procedures
5.1 Introduction
5.2 Protocol Data Unit Structure
5.3 Elements of Protocol
5.4 System Management Procedures
6. System Management Interfaces
6.1 Introduction
6.2 Application Layer Management Interface
6.3 Data Link Layer Management Interface
6.4 Physical Layer Management Interface
7. Data Link Layer - Service Specifications
7.1 Introduction
7.2 Data Link Layer-Upper Layer Interface
7.3 Conformance
8. Data Link Layer - Protocol and Procedures
8.1 Introduction
8.2 Protocol Data Unit Structure
8.3 Elements of Protocol
8.4 Data Link Layer Procedures
9. Physical Layer - Service Specifications
9.1 Introduction
9.2 Data Link Layer-Physical Layer Interface
10. Twisted Pair Type A Physical Layer
10.1 Introduction
10.2 Functional Specifications
10.3 Electrical Specifications
10.4 Bus Topology
10.5 Mechanical Specifications
10.6 Repeaters
11. Twister Pair Type B Physical Layer
11.1 Introduction
11.2 Functional Specifications
11.3 Electrical Specifications
11.4 Bus Topology
11.5 Mechanical Specifications
11.6 Repeaters
NUMEROUS FIGURES
Appendix Implementation Guidelines
A1. Conformance
A2. Physical Layer
A2.1 Type Selection
A2.2 Encoding
A2.3 Optional Functions
A2.4 Unit Loads
A2.5 Physical Media Spurs
A2.6 Drops
A2.7 Static Discharge
A2.8 Bus Powered Devices
A2.9 Signal Reference
A2.10 Self-Directing Repeaters
A2.11 Hardware Reset
A3. Generic Bus Services
A3.1 Generic Bus Services Memory Model
A4.2 Message Structure
A4.3 Intradevice Task Messaging
A4.4 Protocol Implementation
A4.5 Example
A4.6 Extensions and Routing
A4. System Management
A4.1 Message Structure
A4.2 Use of System Management
FIGURES
A.1 NRZI Encoding
A.2 Avoiding Spurs
A.3 Power Protection Technique
A.4 Grounding Arrangements
A.5 GBS Frame Structure
A.6 Route: Master to Slave
A.7 Route: Master Extension to Slave
A.8 Route: Master to Slave Extension
A.9 Route: Master Extension to Slave Extension
A.10 Route from Serial Interface
A.11 Route from Parallel Interface, Devices 1-254
A.12 Route from Parallel Interface, Devices 0 and 255
A.13 Route from Local Task, Devices 1-254
A.14 Route from Local Task, Devices 0 and 255
A.15 System Management Message Structure
A.16 All Device Reset Request
A.17 Read Buffer Size Request
A.18 Read Buffer Size Response
Defines an interconnect bus for microcontrollers and devices with limited reprogrammability. Provides a multi drop bit serial communication protocol that will allow the interconnection of distributed, independently manufactured devices. The protocol is optimized for instrumentation, distributed data acquisition systems, control devices and test and measurement. Coverage includes: overview and architecture; generic bus service (protocols and procedure); system management (service specifications); system management interfaces; data link layer (protocol and procedures). Also gives detailed diagrams.
DocumentType |
Standard
|
PublisherName |
Institute of Electrical & Electronics Engineers
|
Status |
Withdrawn
|
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ISO/IEC 3309:1993 | Information technology — Telecommunications and information exchange between systems — High-level data link control (HDLC) procedures — Frame structure |
TIA 485 : A1998(R2012) | ELECTRICAL CHARACTERISTICS OF GENERATORS AND RECEIVERS FOR USE IN BALANCED DIGITAL MULTIPOINT SYSTEMS |
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