BS IEC 62265:2005
Withdrawn
A Withdrawn Standard is one, which is removed from sale, and its unique number can no longer be used. The Standard can be withdrawn and not replaced, or it can be withdrawn and replaced by a Standard with a different number.
Advanced library format (ALF) describing integrated circuit (IC) technology, cells and blocks
Hardcopy , PDF
06-04-2010
English
11-10-2005
FOREWORD
IEEE Introduction
1 Overview
1.1 Scope and purpose
1.2 Application of this standard
1.3 Conventions used in this standard
1.4 Contents of this standard
2 References
3 Definitions
4 Acronyms
5 ALF language construction principles
5.1 ALF metalanguage
5.2 Categories of ALF statements
5.3 Generic objects and library-specific objects
5.4 Singular statements and plural statements
5.5 Instantiation statement and assignment statement
5.6 Annotation, arithmetic model, and related statements
5.7 Statements for parser control
5.8 Name space and visibility of statements
6 Lexical rules
6.1 Character set
6.2 Comment
6.3 Delimiter
6.4 Operator
6.5 Number
6.6 Index value and index
6.7 Multiplier prefix symbol and multiplier prefix value
6.8 Bit literal
6.9 Based literal
6.10 Boolean value
6.11 Arithmetic value
6.12 Edge literal and edge value
6.13 Identifier
6.14 Quoted string
6.15 String value
6.16 Generic value
6.17 Vector expression macro
6.18 Rules for whitespace usage
6.19 Rules against parser ambiguity
7 Generic objects and related statements
7.1 Generic object
7.2 All purpose item
7.3 Annotation
7.4 Annotation container
7.5 ATTRIBUTE statement
7.6 PROPERTY statement
7.7 ALIAS declaration
7.8 CONSTANT declaration
7.9 KEYWORD declaration
7.10 SEMANTICS declaration
7.11 Annotations and rules related to a KEYWORD or a
SEMANTICS declaration
7.12 CLASS declaration
7.13 Annotations related to a CLASS declaration
7.14 GROUP declaration
7.15 TEMPLATE declaration
7.16 TEMPLATE instantiation
7.17 INCLUDE statement
7.18 ASSOCIATE statement and FORMAT annotation
7.19 REVISION statement
8 Library-specific objects and related statements
8.1 Library-specific object
8.2 LIBRARY and SUBLIBRARY declaration
8.3 Annotations related to a LIBRARY or a SUBLIBRARY
declaration
8.4 CELL declaration
8.5 Annotations related to a CELL declaration
8.6 PIN declaration
8.7 PINGROUP declaration
8.8 Annotations related to a PIN or a PINGROUP declaration
8.9 PRIMITIVE declaration
8.10 WIRE declaration
8.11 Annotations related to a WIRE declaration
8.12 NODE declaration
8.13 Annotations related to a NODE declaration
8.14 VECTOR declaration
8.15 Annotations related to a VECTOR declaration
8.16 LAYER declaration
8.17 Annotations related to a LAYER declaration
8.18 VIA declaration
8.19 Annotations related to a VIA declaration
8.20 RULE declaration
8.21 ANTENNA declaration
8.22 BLOCKAGE declaration
8.23 PORT declaration
8.24 Annotations related to a PORT declaration
8.25 SITE declaration
8.26 Annotations related to a SITE declaration
8.27 ARRAY declaration
8.28 Annotations related to an ARRAY declaration
8.29 PATTERN declaration
8.30 Annotations related to a PATTERN declaration
8.31 REGION declaration
8.32 Annotations related to a REGION declaration
9 Description of functional and physical implementation
9.1 FUNCTION statement
9.2 TEST statement
9.3 Definition and usage of a pin variable
9.4 BEHAVIOR statement
9.5 STRUCTURE statement and CELL instantiation
9.6 STATETABLE statement
9.7 NON_SCAN_CELL statement
9.8 RANGE statement
9.9 Boolean expression
9.10 Boolean value system
9.11 Boolean operations and operators
9.12 Vector expression and control expression
9.13 Specification of a pattern of events
9.14 Predefined PRIMITIVE
9.15 WIRE instantiation
9.16 Geometric model
9.17 Predefined geometric models using TEMPLATE
9.18 Geometric transformation
9.19 ARTWORK statement
9.20 VIA instantiation
10 Description of electrical and physical measurements
10.1 Arithmetic expression
10.2 Arithmetic operations and operators
10.3 Arithmetic model
10.4 HEADER, TABLE, and EQUATION statements
10.5 MIN, MAX, and TYP statements
10.6 Auxiliary arithmetic model
10.7 Arithmetic submodel
10.8 Arithmetic model container
10.9 Generally applicable annotations for arithmetic
models
10.10 VIOLATION statement, MESSAGE TYPE, and MESSAGE
annotation
10.11 Arithmetic models for timing, power, and signal
integrity
10.12 FROM and TO statements
10.13 Annotations related to timing, power, and signal
integrity
10.14 Arithmetic models for environmental conditions
10.15 Arithmetic models for electrical circuits
10.16 Annotations for electrical circuits
10.17 Miscellaneous arithmetic models
10.18 Arithmetic models related to structural implementation
10.19 Arithmetic models related to layout implementation
10.20 Annotations related to arithmetic models for layout
implementation
10.21 Arithmetic submodels for timing and electrical data
10.22 Arithmetic submodels for physical data
Annex A (informative) Syntax rule summary
Annex B (informative) Semantics rule summary
Annex C (informative) ALF library example
Annex D (informative) Bibliography
Annex E (informative) List of Participants
Provides data specification language of library elements for design applications used to implement an integrated circuit (IC).
Committee |
EPL/501
|
DocumentType |
Standard
|
Pages |
296
|
PublisherName |
British Standards Institution
|
Status |
Withdrawn
|
Provides rules that describe ALF and how tool developers, integrators, library creators, and library users should use it.
Standards | Relationship |
IEC 62265:2005 | Identical |
ISO/IEC 8859-1:1998 | Information technology 8-bit single-byte coded graphic character sets Part 1: Latin alphabet No. 1 |
IEC 61691-1-1:2011 | Behavioural languages - Part 1-1: VHDL Language Reference Manual |
IEC 61523-3:2004 | Delay and power calculation standards - Part 3: Standard Delay Format (SDF) for the electronic design process |
IEEE/ASTM SI_10-2010 | American National Standard for Metric Practice |
IEEE 1481-2009 | IEEE Standard for Integrated Circuit (IC) Open Library Architecture (OLA) |
ISO/IEC 9899:2011 | Information technology Programming languages C |
IEC 61691-4:2004 | Behavioural languages - Part 4: Verilog® hardware description language |
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