BS EN 190000:1996

Foreword
Preface
1 Scope
2 General
2.1 Order of precedence
2.2 Related documents
2.3 Units, symbols and terminology
2.3.1 General
2.3.2 General terms for integrated circuits
2.4 Standard and preferred values
2.5 Marking of component and package
2.5.1 Terminal identification
2.5.2 Factory identification code
2.5.3 Precautions for Electrostatic Sensitive Devices
2.5.4 Optional tests
2.5.5 Marking symbols location
2.6 Ordering information
3 Quality assessment procedures
3.1 Primary stage of manufacture and subcontracting
3.2 Structural similarity procedures
3.2.1 General rules
3.2.2 Test dependent criteria for structural similarity
3.3 Qualification approval procedure
3.3.1 Definition of production lot and inspection lot
3.3.2 Approval procedure
3.3.3 Major alterations
3.3.4 Examples of major alterations
3.4 Quality conformance inspection
3.4.1 Division into Groups and Sub-Groups
3.4.2 Quality inspection testing
3.4.3 Sampling procedures for small lots
3.4.4 Supplementary procedure for reduced inspection
3.4.5 Re-submission of rejected lots
3.4.6 Certified test records
3.4.7 Delayed delivery
3.4.8 Delivery of devices subjected to destructive
        or non-destructive tests
3.4.9 Supplementary procedure for deliveries
3.4.10 Supplementary information
3.5 Capability Approval
3.6 Inspection requirements
3.7 Statistical Process Control (SPC)
4 Test and measurement procedures
4.1 Standard conditions for testing
4.1.1 Standard atmospheric conditions for reference
4.1.2 Standard atmospheric conditions for referee tests
4.1.3 Standard atmospheric conditions for testing
4.1.4 Standard atmospheric conditions for electrical
        measurements
4.1.5 Standard recovery conditions
4.2 Visual examination
4.2.1 Internal visual examination (pre-cap inspection)
4.2.2 External visual examination
4.3 Dimensions
4.4 Immersion in cleaning solvents
4.5 Electrical measurement procedure
4.5.1 Ratings
4.5.2 Equilibrium conditions
4.5.3 Temperature
4.5.4 Precautions
4.5.5 Measurement circuit requirements
4.5.6 Multiple integrated circuits
4.5.7 Unspecified connections to terminals
4.5.8 Electrical measuring methods
4.5.9 Transient energy test
4.5.10 Correlated measurements
4.5.11 Die attach
4.5.12 Latch-up
4.6 Environmental testing procedures
4.6.1 Storage at high and low temperatures
4.6.2 Damp heat, steady-state
4.6.3 Damp heat
4.6.4 Shock
4.6.5 Vibrations (sinusoidal)
4.6.6 Vibration, fixed frequency
4.6.7 Acceleration, steady-state
4.6.8 Change of temperature
4.6.9 Sealing
4.6.10 Solderability of terminations
4.6.11 Resistance of components to soldering heat
4.6.12 Robustness of terminations and integral
        mounting devices
4.6.13 Industrial atmosphere
4.6.14 Salt mist
4.6.15 Flammability test of plastic encapsulated devices
4.6.16 Moisture induced cracking test
4.6.17 Internal wire pull test
4.6.18 Die shear strength test
4.7 Definition of axes for mechanical tests
4.8 Electrical endurance testing
4.8.1 General conditions
4.8.2 Test temperature and duration
4.8.3 Operating modes and specific conditions for
        testing
4.8.4 Initial and end point tests
4.9 Accelerated test procedures
4.9.1 Requirements for eligibility in periodic testing
4.9.2 Thermally accelerated electrical endurance
        testing
4.9.3 Level of activation energy for thermally
        accelerated tests
4.10 Screening
4.10.1 Screening procedures
4.10.2 Screens and tests description
4.10.3 Specified conditions
Annex A: Internal visual examination and alternate method
Annex B: Comparison between IEC and CECC documents
(environmental and endurance testing procedures)
Annex C: Capability approval
Annex D: CQC specification writer's guide
Annex E: Guide for application of structural similarity
procedures described in clause 3.2
Annex F: Statistical process control (SPC)
Annex G: EQML for integrated circuits

Annexes cover capability approval, structural similarity, SPC and EQML.