ANSI/ESDA/JEDEC JS-002 : 2018
Superseded
A superseded Standard is one, which is fully replaced by another Standard, which is a new edition of the same Standard.
View Superseded by
ANSI/ESDA/JEDEC JOINT STANDARD FOR ELECTROSTATIC DISCHARGE SENSITIVITY TESTING – CHARGED DEVICE MODEL (CDM) – DEVICE LEVEL
Hardcopy , PDF
English
01-01-2019
05-14-2025
This standard establishes the procedure for testing, evaluating, and classifying devices and microcircuits according to their susceptibility (sensitivity) to damage or degradation by exposure to a defined field-induced charged device model (CDM) electrostatic discharge (ESD).
| DocumentType |
Standard
|
| ISBN |
1-58537-298-6
|
| Pages |
45
|
| PublisherName |
JEDEC Solid State Technology Association
|
| Status |
Superseded
|
| SupersededBy | |
| Supersedes |
| DSCC V62/22612:2022 | MICROCIRCUIT, BiCMOS, ULTRA-LOW-NOISE JESD204B DUAL-LOOP CLOCK JITTER CLEANER, MONOLITHIC SILICON |
| JEDEC JESD82-531A:2024 | DDR5 Clock Driver Definition (DDR5CK01) |
| DSCC V62/P22612A:2022 | MICROCIRCUIT, BiCMOS, ULTRA-LOW-NOISE JESD204B DUAL-LOOP CLOCK JITTER CLEANER, MONOLITHIC SILICON |
| DSCC V62/22612A:2023 | MICROCIRCUIT, BiCMOS, ULTRA-LOW-NOISE JESD204B DUAL-LOOP CLOCK JITTER CLEANER, MONOLITHIC SILICON |
| JEDEC JESD82-513:2023 | DDR5 Registering Clock Driver Definition (DDR5RCD03) |
| DSCC V62/23623:2025 | MICROCIRCUIT, LINEAR, ENHANCED PRODUCT 2-V TO 5.5 V, LOW NOISE, HEX SCHMITTTRIGGER INVERTERS, MONOLITHIC SILICON |
| DSCC V62/23612:2023 | MICROCIRCUIT, BiCMOS, ULTRA-LOW-NOISE JESD204B DUAL-LOOP CLOCK JITTER CLEANER, MONOLITHIC SILICON |
| JEDEC JEP30-E100A:2023 | Part Model Electrical Guidelines for Electronic-Device Packages – XML Requirements |
| DSCC V62/24620:2024 | MICROCIRCUIT, DIGITAL, HEX INVERTER BUFFERS/DRIVERS WITH OPEN-DRAIN OUTPUTS, MONOLITHIC SILICON |
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