JEDEC JESD78F.02:2023
Current
Current
The latest, up-to-date edition.
IC Latch-Up Test
Available format(s)
Hardcopy , PDF
Language(s)
English
Published date
01-11-2023
Publisher
Free
Including GST where applicable
This standard establishes the procedure for testing, evaluation and classification of devices and microcircuits according to their susceptibility (sensitivity) to damage or degradation by exposure to a defined latch-up stress.
| Committee |
JC-14.1
|
| DocumentType |
Standard
|
| Pages |
94
|
| PublisherName |
JEDEC Solid State Technology Association
|
| Status |
Current
|
| Supersedes |
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