BS 5070-4:1990
Current
The latest, up-to-date edition.
Engineering diagram drawing practice Recommendations for logic diagrams
Hardcopy , PDF
English
31-10-1990
Foreword
Committees responsible
Recommendations
0 Introduction
1 Scope
2 Definitions
3 Symbols
4 Signal names and characteristics
5 Logic diagrams
6 Logic circuit diagrams
7 Conversion of a logic diagram into a logic circuit
diagram
Appendix
A Commonly used abbreviations
Tables
1 Orientation of symbols
2 Possible combinations
3 Examples of symbol duality using the polarity
indicator
4 Examples of symbol duality using the negation symbol
5 Diagram indications and relationships
6 Examples of distributed connections
7 Commonly used abbreviations
Figures
1 Examples of signal name allocation
2 Examples of clock pulses
3 Bit and byte labelling
4 Logic states
5 Negation
6 Examples of negation
7 Logic levels
8 Indication of logic levels
9 Logic convention
10 Examples of polarity indication
11 AND function
12 OR function
13 Symbol duality using negation symbol
14 Inversion
15 Negation
16 Polarity and negation matching
17 Connections with inversion
18 Connections without inversion
19 Connections with negation
20 Connections without negation
21 Examples of supplementary information
22 Logic diagram conversion using a combinative
element, example 1
23 Logic diagram conversion using a combinative
element, example 2
24 Diagram conversion
Principles and presentation. Covers signal names, characteristics and logic circuit diagrams.
Committee |
TPR/1
|
DevelopmentNote |
To be read in conjunction with BS 5070-1(1988) & BS 5070-2(1988). Supersedes 87/71938 DC. (07/2005)
|
DocumentType |
Standard
|
Pages |
48
|
PublisherName |
British Standards Institution
|
Status |
Current
|
This part of BS 5070 gives recommendations for the practice to be followed in preparing logic diagrams and the application of binary logic symbols for such diagrams. It should be read in conjunction with Part 1 and Part 2. Analogue and hybrid techniques have not been considered.
This part is applicable to those forms of integrated circuit design in which the basic logic circuit elements are predefined cells which are laid out and interconnected in a manner similar to packages on a printed circuit board. These integrated circuits are known as uncommitted logic arrays, gate arrays, or standard cell arrays.
NOTE 1 The logic circuit diagrams will not contain internal pin numbers, but in all other respects should have the characteristics of the diagrams shown as examples in this standard.
NOTE 2 The symbols and descriptions have been prepared with a view to electrical applications but they are equally applicable to other, non-electrical systems such as pneumatic, hydraulic or mechanical.
NOTE 3 The titles of the publications referred to in this standard are listed on the inside back cover.
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